Why Your First Band Diagram Fails
You start with the textbook diagram — flat bands on one side, bent near the junction, nice neat depletion region. It looks right. Then you simulate it yourself, and the currents are off by three orders of magnitude. This happens more often than anyone admits. The gap between Semiconductor Physics And Devices Basic Principles as taught and how they actually behave under real bias is wider than most people realize. Most courses cover band theory, doping, drift-diffusion, and the ideal diode equation in that order. That sequence makes sense for exams. It does not make sense for simulation. When I first tried to model a simple pn junction, I followed the textbook derivation exactly — Fermi level alignment, built-in potential from dopant concentrations, depletion approximation. The result was a current density that looked physically reasonable until I added a reverse bias. At that point the leakage current stayed flat instead of saturating, and the capacitance came out wrong. I spent two weeks chasing the bug before I realized the issue was not in my code but in my assumptions. The depletion approximation breaks down when the dopant concentration is non-uniform or when the depletion width becomes comparable to the Debye length. My fix was switching to a full Poisson solver with a non-uniform mesh. Instead of assuming the charge density is a step function at the junction, I resolved the dopant profile as an actual gradient — Gaussian for ion-implanted regions, linear for diffused junctions. This changed the depletion width calculation significantly and brought the C-V characteristics in line with measured data. The simulation runtime went from about forty minutes to roughly twelve on the same machine because I removed the unnecessary fine mesh outside the depletion region. You do not need to resolve everything equally. Concentrate resolution where the electric field changes fastest.
Another thing nobody emphasizes enough is that the Fermi level does not move uniformly through the bandgap when you apply bias. Under forward bias, the quasi-Fermi levels split. Under reverse bias, they stay close together in the depletion region but separate in the neutral regions where minority carriers accumulate. If you are solving drift-diffusion equations, you need both quasi-Fermi levels as independent variables. Treating them as a single Fermi level is the most common beginner mistake in device simulation. It produces the right built-in potential and the wrong I-V curve. Generation-recombination in the depletion region is the second reason simple models fail. The ideal diode equation assumes all current is diffusion-limited. In reality, Shockley-Read-Hall recombination through mid-gap traps dominates in wide-bandgap devices and at moderate reverse bias. The current then follows an exponential with an ideality factor between 1.5 and 2, not 1. If your model uses SRH recombination only in the neutral regions, you will miss this entirely. I had to add a trap-assisted tunneling component to a SiC diode model because the measured reverse leakage was ten times higher than the SRH prediction. The workaround was calibrating the trap density and energy level against temperature-dependent C-V measurements, not against the I-V curve alone. Temperature data separates trap-assisted tunneling from thermal generation because they scale differently with temperature. Interface states are another hidden variable. A clean textbook problem has no interface charge. A real device always does. Gate oxide traps in MOS structures shift the threshold voltage unpredictably. In a heterojunction, interface states pin the Fermi level and reduce the effective barrier height. I learned this the hard way when my GaAs MESFET model showed transconductance values that dropped sharply at low gate voltages — something the textbook equations do not predict. Adding an interface state density of about 1e12 per cm²-eV at the Schottky contact fixed the behavior. Without that parameter, the model was optimistic by a factor of three in the subthreshold region.
Here is a practical workflow that avoids most of the common pitfalls. Start with the equilibrium band diagram. Verify the built-in potential by checking that the Fermi level is flat across the entire device. If it is not, your boundary conditions are wrong. Then apply bias incrementally. Small steps — ten millivolts at a time near the turn-on voltage — prevent convergence failures in the solver. Monitor the residual current at each step. If it oscillates rather than decays, your energy grid spacing is too coarse in the depletion region. Refine there and keep the grid coarse elsewhere. This usually cuts the process down from two hours to about fifteen minutes, depending on your setup. Temperature deserves more attention than it gets. Carrier mobility decreases with temperature due to phonon scattering, but intrinsic carrier concentration increases exponentially. The net effect on device behavior depends on which mechanism dominates. In a silicon diode at room temperature, the intrinsic concentration term wins and the forward voltage drops about two millivolts per degree Celsius. In a wide-bandgap device like GaN, the mobility degradation dominates and the behavior is less predictable. I stopped using a single temperature coefficient for mobility and switched to a power-law fit from measured data. The difference was noticeable in thermal stability simulations for power devices. Quantum effects are often ignored entirely, which is fine for most bulk devices but catastrophic for anything below about one hundred nanometers. Confinement in the channel of a thin-film transistor shifts the effective band edges and changes the carrier distribution. If you are modeling a FinFET or a nanowire device without accounting for quantization, your threshold voltage will be off by hundreds of millivolts. The fix is not adding a complex quantum correction to every term. It is applying a simple density-gradient correction to the Poisson solver, which accounts for most of the shift at minimal computational cost. Full Schrödinger-Poisson solutions are overkill for initial design work.
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Parameter extraction is where theory meets reality, and it is usually the weakest part of any model. Textbook parameters come from idealized samples. Your device has defects, non-uniform doping, and contact resistance. The easiest way to reconcile the two is to fit the model to measured data in three regimes: subthreshold, linear, and saturation for transistors; forward, reverse, and breakdown for diodes. Do not try to fit all regimes at once. Adjust parameters one at a time and check which regime each parameter affects. Threshold voltage moves with interface state density and oxide charge. Mobility affects the linear region but not the subthreshold slope. Ideality factor and saturation current control the forward diode characteristic. Contact resistance shifts everything horizontally on the voltage axis. I have seen people spend months trying to make a model match data by tuning parameters that do not exist in the physical system. You are not making the device better by adjusting unphysical parameters. You are masking a flawed model. If your calibrated model requires four interface trap distributions to fit the data, the model is missing a physical mechanism, not that the device is complex. Re-examine the assumptions. More often than not, the answer is simpler than the adjustment. There are tools that automate much of this. Sentaurus Device, Silvaco Atlas, and open-source solvers like nextnano can handle drift-diffusion, hydrodynamic, and quantum-corrected models. Each has different strengths. Sentaurus handles complex 3D geometries well. Silvaco has a more forgiving convergence behavior for beginners. nextnano is free and excellent for 1D and 2D quantum-wire calculations. None of them will save you from bad assumptions. They are only as good as the physics you put into them.
My recommendation is to start with a one-dimensional model of a simple pn junction. Get the equilibrium case exactly right before adding bias, temperature dependence, or any second dimension. A one-dimensional solver runs in seconds on a laptop. If you cannot get the equilibrium band diagram matching analytical results, adding complexity will only hide the error. Once the 1D case converges and matches hand calculations, add the bias sweep. Then add temperature. Then add a second dimension if your device geometry requires it. Each addition is a controlled experiment where you can verify what changed and why. The hardest lesson is accepting that some devices cannot be modeled with standard drift-diffusion alone. Tunneling, hot carrier effects, and self-heating require additional equations that are not always straightforward to implement. In those cases, hybrid approaches work better than forcing a single model. Use drift-diffusion for the bulk behavior and add analytical corrections for the effects that fall outside its scope. This is not a compromise. It is standard practice in industry. The people who try to build a single monolithic model from scratch usually end up with something that looks impressive but matches nothing.
